CY7C53120E4-40SXI | Cypress Semiconductor

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CY7C53120E4-40SXI
Status: 생산 중

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(pdf, 539.48 KB) RoHS PB Free

CY7C53120E4-40SXI

인증 자동차N
플래시(KB)4
Max. Input Clock (MHz)40
최대 작동 온도(°C)85
최대 작동 전압(V)5.00
최소 작동 온도(°C)-40
최소 작동 전압(V)5.00
ROM (KB)12
Tape & ReelN

Pricing & Inventory Availability

1-9 unit Price* 10-24 unit Price* 25-99 unit Price* 100-249 unit Price* 250-999 unit Price* 1000+ unit Price*
$18.00 $17.24 $16.49 $15.73 $14.98 $13.72
Availability Quantity Ships In Buy from Cypress Buy from Distributors
Out of Stock 0 Please click here to check lead times

Packaging/Ordering

패키지
No. of Pins
32
Package Dimensions
810 L x 0 H x 450 W (Mils)
Package Weight
1 340.00 (mgs)
Package Cross Section Drawing
Package Carrier
TUBE
Package Carrier Drawing / Orientation
Standard Pack Quantity
125
Minimum Order Quantity (MOQ)
125
Order Increment
125
Estimated Lead Time (days)
91
HTS Code
8542.31.0001
ECCN
없음
ECCN Suball
EAR99

Quality and RoHS

Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
무연
Y
Lead/Ball Finish
Ni/Pd/Au

패키지 자재 고지

Device Qualification Reports

FIT/MTBF, ESD (HBM/CDM) and Latch-up data available in the Device Qualification Report.

Last Update: 2013년 5월 15일

기술 문서

애플리케이션 설명(1)

제품 변경 고지(PCN) (14)

2017년 11월 09일
Planned Qualification of Spansion Manufacturing Sites for Cypress Products
2017년 10월 31일
Q2, 2012 - Q4, 2013 Horizon Report
2017년 10월 30일
Q1, 2012 - Q2, 2013 Horizon Report
2017년 10월 25일
Qualification of Copper Palladium Wire Bonds for Select Lead Frame Products at JCET China
2017년 10월 24일
Transfer of package manufacturing from Cypress Philippines to Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET) for select products
2017년 10월 20일
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products.
2017년 10월 18일
Qualification of Cypress Minnesota as Alternate Wafer Fabrication Facility for Neuron® Chip Network Processor Products
2017년 10월 17일
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products
2017년 10월 16일
Shipping Label Upgrade
2017년 10월 13일
Change in Tube Bundling Ship Process
2017년 10월 13일
Add Alternate Assembly Site for SOIC150mils Pb-Free
2017년 10월 12일
Correction to Affected Devices in PCN#071577: Qualification of 0.9-mil Au wire diameter for CCD and MID devices assembled at CML
2017년 10월 12일
Qualification of KEG6000DA and KEG3000DA Green Mold Compound for 32 leads, Lead-free and standard, 450 mil body size, SOIC Packages Assembled at Cypress
2017년 10월 12일
Qualification of 0.9-mil Au wire diameter for CCD and MID devices assembled at CML

Advanced Product Change Notice (APCN) (2)

2017년 10월 30일
Advance Notification - Planned Changes to MoBL-USB TX3LP18
2017년 10월 30일
Advance Notification - Transfer of Specific Product Manufactured by Cypress Semiconductor Texas to Cypress Manufacturing Minnesota

Product Information Notice (PIN) (4)

2017년 11월 07일
Qualification of Test 25 (Austin, Texas) as an Additional Wafer-Level Test Location.
2017년 11월 06일
Changes to Cypress Address Labels
2017년 11월 06일
Addendum to PIN 135258 - Qualification of JCET as an additional Test and Finish Location for Cypress Products
2017년 10월 25일
Notice of plan to transfer package manufacturing from Cypress Philippines to Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET).