Peripheral Driver Library (PDL) for PSoC Creator | Cypress Semiconductor
Peripheral Driver Library (PDL) for PSoC Creator
The Peripheral Driver Library (PDL) simplifies software development for the PSoC 6 MCU architecture. The PDL reduces the need to understand register usage and bit structures, thus easing software development for the extensive set of peripherals available.
The ModusToolbox software version of PDL is available at the Cypress GitHub site. It is not compatible with PSoC Creator. The ModusToolbox version of the PDL includes support for new PSoC 6 MCU devices and drivers. It also supports macOS and Linux hosts, as well as Windows. Developers should move to the ModusToolbox package as projects and schedules permit.
PDL v3.1 is designed for and works with PSoC® Creator™. PDL v3.1 is expected to be the final PSoC Creator-compatible release. PDL v 3.0.x is installed along with the PSoC Creator 4.2 development tools. This is no longer the newest version of PDL.
PDL v3.1 includes the Cypress USB Device Middleware Library. The USB Device middleware provides a full-speed USB 2.0 Chapter 9 specification-compliant device framework. It uses the USBFS driver from PDL to interface with the hardware. Consistent with the ModusToolbox cross-platform design, there is no PSoC Creator Component for this middleware. To configure the USB Device Middleware, use the usbdev-configurator application. It is in the <PDL directory>\tools folder. it is available for Windows, macOS, and Linux.
The Bootloader SDK has been replaced with Device Firmware Upgrade middleware.
Many individual drivers have been upgraded, particularly the System Power Management (SysPM) driver. These upgrades may add new capabilities and function calls. Occasionally an older function call may be deprecated. In the case that a call is deprecated, older code still functions because older names are redirected to new versions of the function. See the PDL Release Notes for detailed changes.
Developers can also use the PDL with third-party IDEs to develop firmware. The template projects for IAR and Keil IDEs have been updated. They are much easier to use and are consistent with changes implemented for ModusToolbox software.
Different versions of the PDL support different architectures. Earlier versions of the PDL support the FM0+, FM3, and FM4 architectures.
|PDL Version||Supported Architectures||Get It Now|
|PDL v3.1.x||PSoC 6 MCU||Download|
|PDL v3.0.x||PSoC 6 MCU||Download|
|PDL v2.1.x||FM4, FM0+||Download|
|PDL v2.0.x||FM4, FM3, FM0+||Download|
The PDL is a superset of all the code required to build any driver for the supported architecture. It provides a high-level API to configure, initialize, and use a peripheral. PDL v3.x is a complete redesign of the library to support the dual core and unique peripherals of the PSoC 6 MCU architecture. Code written in PDL v2 is not forward compatible to PSoC 6 MCU.
Developers who wish to program at the register level should also use the PDL. Each version of the PDL includes the necessary startup code and IDE project files for each supported device. In addition, most of the PDL is provided as source code. By examining the PDL source code, along with the appropriate data sheets and technical collateral, you can learn the information you need to program a peripheral at the register level.
For PDL v2.1 and older, please visit the Peripheral Driver Library (PDL) Software and Documentation Archive page for software and documentation.
PDL v3.1 is a complete software development kit that occupies the space between the PSoC 6 MCU hardware and your application. It includes all required device-specific files, as well as higher-level middleware and RTOS support.
A PSoC 6 device has an Arm® Cortex® M4 and a Cortex M0+ processor in a single die, with multiple peripherals. The PDL is designed so that in most cases either core can use any peripheral. The PDL is designed to be both comprehensive and flexible to handle PSoC 6 devices.
The PDL also includes middleware and RTOS code that is fully integrated with the PDL. If you have your own middleware or preferred RTOS, use the resources provided as examples of how to integrate such code with the PDL.
|Bluetooth Low Energy Library||middleware\ble||A Bluetooth Core Specification v5.0 compliant protocol stack|
|Emulated EEPROM Library||middlware\em_eeprom||Create an emulated EEPROM in flash with wear leveling and ability to restore corrupted data|
|Segger emWin Library||middleware\emWin||A GUI library for embedded devices|
|USBFS Device Library||middleware\usb_dev||A full-speed USB 2.0 Chapter 9 specification-compliant device framework|
|FreeRTOS||rtos||A small operating system intended for use on microcontrollers|
|Secure Image||보안||Reference design for building a secure system in user Flash and RAM|
|Device Firmware Update||dfu||Low-level SDK for updating firmware images|
|Retarget I/O||utilities\retarget_io||Retarget the I/O functions of the standard C run-time library to a user-defined target|
|BLE ECO||BLE ECO Clock Block||Manage the high-accuracy BLE clock|
|CRYPTO||Cryptographic Accelerator||Perform cryptographic operations on user-designated data; PDL provides public header files and binary libraries|
|CTB||Continuous Time Block||Configure and manage the analog continuous time block|
|CTDAC||Continuous Time Digital-to-Analog Converter||Configure and manage the 12-bit, continuous time digital to analog converter|
|DMA||Direct Memory Access||Perform direct memory transfers|
|EFUSE||Electronic Fuses||Read the customer-accessible electronic fuses|
|플래시||Flash Memory||Manage flash memory operations|
|GPIO||General Purpose I/O Ports||Configure and access device input/output pins|
|I2S||Inter-IC Sound||Manage digital audio streaming to external I2S devices|
|IPC||Inter-Processor Communication||Manage data transfer between CPUs or processes in a device|
|LPCOMP||Low-Power Comparator||Fast comparison of internal and external analog signals in all power modes|
|LVD||Low-Voltage Detect||Configure and manage low-voltage detection|
|MCWDT||Multi-Counter Watchdog Timer||Manage counters to create a free-running timer or periodic interrupts|
|PDM_PCM||PDM to PCM Converter||Convert one-bit digital audio streaming data to PCM data|
|PROFILE||Energy Profiler||Measure relative energy consumption of monitored operations|
|PROT||Memory Protection||Manage the MPU, Shared MPU (SMPU), and Peripheral Protection Unit (PPU)|
|RTC||Real Time Clock||Manage calendar date and clock time|
|SAR||Successive Approximation Register Analog-to-Digital Converter||Configure and manage the 12-bit SAR ADC|
|SCB||Serial Communication Block||Manage serial communication as I2C, SPI, or UART|
|SMIF||Serial Memory Interface||Manage an SPI-based interface to external memory devices|
|SYSANALOG||System Analog Reference||Generate highly-accurate reference voltages and currents for the analog subsystem|
|SYSCLK||System Clock||Manage system and peripheral clocks|
|SYSINT||System Interrupt||Manage interrupts and exceptions, in conjunction with the ARM Cortex Microcontroller Software Interface Standard (CMSIS) Nested Vectored Interrupt Controller (NVIC) API|
|SYSLIB||System Library||Utility functions to handle delays, register read/write, asserts, software reset, silicon unique ID, and more|
|SYSPM||System Power Management||Manage power modes and get power mode status|
|SYSTICK||ARM System Timer||Manage a 24-bit down-counter timer|
|TCPWM||Timer Counter PWM and Quadrature Decoder||Manage a 16- or 32-bit periodic counter, PWM, or Quadrature decoder|
|TRIGMUX||Trigger Multiplexer||Manage the multiplexing of trigger outputs to specific trigger inputs across multiple peripherals|
|USBFS||USB Full-Speed Device||Configure and manage a USB full speed device|
|WDT||Watchdog Timer||Manage the watchdog timer|
Supported Development Tools
In addition to PSoC Creator 4.2, the PDL is tested with and project files are provided for: