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AN77900 - PSoC® 3 and PSoC 5LP Low-Power Modes and Power Reduction Techniques | Cypress Semiconductor

AN77900 - PSoC® 3 and PSoC 5LP Low-Power Modes and Power Reduction Techniques

최신 업데이트: 
2020년 5월 30일
버전: 
*G

The PSoC 3 and PSoC 5LP low-power modes allow you to reduce overall current draw without limiting functionality, especially when implemented with other power-saving features and techniques.

This application note describes the fundamentals of the PSoC low-power modes, provides information on Active mode power-saving methods, and discusses other low-power considerations. It is assumed that the reader is familiar with PSoC 3 and PSoC 5LP device architecture and PSoC Creator operation. A list of related documents that expand on some complex topics mentioned here is available at the end of this application note.


Project
Device
Development Kit
CY8CKIT-xxx
Compiler
아키텍처
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN77900.zip

Prod
아니오
YES*
아니오
해당 없음
해당 없음
해당 없음
Prod
아니오
YES*
아니오
해당 없음
AN77900_Archive.zip
ES3, Prod
아니오
YES*
아니오
해당 없음
해당 없음
해당 없음
ES1, Prod
아니오
YES*
아니오
해당 없음

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN77900_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the three most recent versions of PSoC Creator:

  • AN77900.zip is used with PSoC Creator 2.2 SP1
  • AN77900_Archive.zip is used with PSoC Creator 2.1 SP1/2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

번역 문서는 참고용으로만 제공하는 것입니다. 설계 과정에 참여할 경우에는 영어 버전 문서를 참고하는 것이 좋습니다.