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Low Voltage Detect (PDL_LVD) | Cypress Semiconductor

Low Voltage Detect (PDL_LVD)

최신 업데이트: 
2018년 2월 27일
  • Two-channel low voltage (VCC) monitor
  • Independent detect and release settings
  • Configurable interrupt request and reset
기호 도식
Low_Voltage_Detect_Symbol Diagram

일반적인 설명

The Low Voltage Detection (LVD) Component monitors the system power supply voltage to avoid uncontrolled processor halt or brownout conditions. In addition to a dedicated reset voltage level setting, there are two channels with configurable detection voltages that can generate interrupts, warning the application of an impending low voltage condition.

On S6E1B devices there is also a release threshold that can be used to release the device from reset or generate an interrupt, signaling that the low power situation has passed.