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Reset (PDL_RESET) | Cypress Semiconductor

Reset (PDL_RESET)

최신 업데이트: 
2018년 2월 27일
버전: 
1.0
특징
  • Reports the cause of a device reset
  • Power-on or INITX reset
  • Software reset
  • Watchdog reset
  • Clock failure or anomalous frequency detect
기호 도식
Reset_Symbol Diagram

일반적인 설명

The Reset Component determines the cause of a device reset. It is often used to manage serious application problems gracefully.

참고: the application must enable clock failure and anomalous frequency detection with the Clock Supervisor (CSV) component.

참고: resets from standby mode are configured and detected in the Low Power Mode (LPM) Component, not Reset.