You are here

CY14MB064Q1B/CY14MB064Q2B, CY14ME064Q1B/CY14ME064Q2B: 64-Kbit (8 K × 8) SPI nvSRAM | Cypress Semiconductor

CY14MB064Q1B/CY14MB064Q2B, CY14ME064Q1B/CY14ME064Q2B: 64-Kbit (8 K × 8) SPI nvSRAM

최신 업데이트: 
2020년 5월 28일
버전: 
*L

특징

  • 64-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 8 K × 8
    • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE)
    • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL)
    • Support automatic STORE on power-down with a small capacitor (except for CY14MX064Q1B)
  • High reliability
    • Infinite read, write, and RECALL cycles
    • 1million STORE cycles to QuantumTrap
    • Data retention: 20 years at 85 °C
  • High speed serial peripheral interface (SPI)
    • 40-MHz clock rate SPI write and read with zero cycle delay
    • Supports SPI mode 0 (0,0) and mode 3 (1,1)
  • SPI access to special functions
    • Nonvolatile STORE/RECALL
    • 8-byte serial number
    • Manufacturer ID and Product ID
    • Sleep mode
  • Write protection
    • Hardware protection using Write Protect (WP) pin
    • Software protection using Write Disable instruction
    • Software block protection for 1/4, 1/2, or entire array
  • 적은 전력 소비
    • Average active current of 3 mA at 40 MHz operation
    • Average standby mode current of 120 μA
    • Sleep mode current of 8 μA
  • Industry standard configurations
    • Operating voltages:
      • CY14MB064Q1B/CY14MB064Q2B: VCC = 2.7 V to 3.6 V
      • CY14ME064Q1B/CY14ME064Q2B: VCC = 4.5 V to 5.5 V
    • Industrial temperature
    • 8-pin small outline integrated circuit (SOIC) package
    • Restriction of hazardous substances (RoHS) compliant



기능 개요

The Cypress CY14MX064Q combines a 64 Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 8 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14MX064Q1B). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). You can also initiate the STORE and RECALL operations through SPI instruction.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.

번역 문서는 참고용으로만 제공하는 것입니다. 설계 과정에 참여할 경우에는 영어 버전 문서를 참고하는 것이 좋습니다.