CY7C1480BV25: 72-Mbit (2 M × 36) Pipelined Sync SRAM | Cypress Semiconductor
CY7C1480BV25: 72-Mbit (2 M × 36) Pipelined Sync SRAM
최신 업데이트:
2016년 6월 24일
버전:
*N
72-Mbit (2M x 36) Pipelined Sync SRAM
특징
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Supports bus operation up to 250 MHz
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Available speed grades are 250, 200, and 167 MHz
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Registered inputs and outputs for pipelined operation
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2.5-V core power supply
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2.5-V I/O operation
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Fast clock-to-output time
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3.0 ns (for 250 MHz device)
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Provide high performance 3-1-1-1 access rate
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User selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
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자세한 사항은 pdf를 참조하십시오
기능 설명
The CY7C1480BV25 SRAM integrates 2 M × 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).