User Module Datasheet: Triple Input 8-Bit Incremental ADC Datasheet TriADC8 V 1.10 (CY8C29/27xxx, CY8CLED08/16, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28x43, CY8C28x52) | Cypress Semiconductor
User Module Datasheet: Triple Input 8-Bit Incremental ADC Datasheet TriADC8 V 1.10 (CY8C29/27xxx, CY8CLED08/16, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28x43, CY8C28x52)
최신 업데이트:
2015년 3월 26일
버전:
1.10
Features and Overview
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Samples three inputs simultaneously
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8-bit resolution, two’s complement or unsigned results
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Sample rates from 4 to greater than 10,000 sps
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Maximum input range Vss to Vdd
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Integrating converter provides good normal mode rejection
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Internal or external clock
The TriADC8 is a triple input integrating ADC with 8-bits of resolution. It can be configured to remove unwanted high frequencies by optimizing the integrate time. Input voltage ranges, including rail-to-rail, may be measured by configuring the proper reference voltage and analog ground. The output is configurable two’s complement or unsigned integers based on an input voltage between –Vref and +Vref centered at AGND.
Sample rates up 5000 sps are achievable, depending on the selection of the Data Clock, and CalcTime parameters. Please refer to the triADC8_SetCalcTime API for setting the CalcTime parameter.