CY8C20x37 | Cypress Semiconductor


The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast central processing unit (CPU), flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

The architecture for CY8C20xx7/S device family consists of three main areas, the core, CapSense analog system, and System resources.  A common, versatile bus allows connection between I/O and the analog system. Each CY8C20x37/47/67/S PSoC device includes a dedicated CapSense block that provides sensing and scanning control circuitry for capacitive sensing applications. Depending on the PSoC package, up to 34 GPIOs are also included.

블록 다이어그램

CY8C20xx7s block diagram


주요한 특징:

  • Up to 31 CapSense I/Os and 6 sliders
  • Core Voltage: 1.8V - 5.5V
  • Multiple Power Saving Modes
    • Standby Current: 1.1 µA
    • Deep Sleep Mode: 100 nA
  • QuietZone™ technology delivers inherent noise immunity to radiated and conducted noise
  • CSD PLUS™ - Cypress` proven sensing algorithm ensures industry’s best SNR
  • 근접 센싱
  • Industry’s best Liquid Tolerant Sensing
  • Wide range of interface support: I2C, SPI
  • Wide variety of flash sizes: 8K, 16K, 32K 
  • Wide range of packages: 30-ball WLCSP, 16SOIC, 16QFN (3x3mm) to 48QFN (6x6mm)
  1. Download the Getting started with CapSense" Design Guide
  2. Install PSoc Designer to begin development
  3. Purchase one of the CapSense development kits to evaluate your design